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Siddharth Varangaonkar
DR. VISHWANATH KARAD MIT WORLD PEACE UNIVERSITY, PUNE • Computer
49 Circuits
sync down by siddharth
Siddharth Varangaonkar
0
0
Sep 21, 2021
74LS76
74LS08
mod 5 by sid
Siddharth Varangaonkar
0
0
Sep 21, 2021
74LS76
74LS00
3 bit synchronous up counter by siddharth
Siddharth Varangaonkar
0
0
Sep 21, 2021
74LS76
74LS08
asyn down by siddharth
Siddharth Varangaonkar
0
0
Sep 21, 2021
74LS76
asynchronous up counter by sid
Siddharth Varangaonkar
0
0
Sep 21, 2021
74LS76
binary to Gray siddharth
Siddharth Varangaonkar
0
0
Sep 21, 2021
74LS86
MOD 5 UP - Copy
Siddharth Varangaonkar
0
0
Sep 9, 2021
74LS76
74LS00
SOP example - Copy
Siddharth Varangaonkar
0
0
Sep 6, 2021
74LS153
POS example - Copy
Siddharth Varangaonkar
0
0
Sep 6, 2021
74LS153
Half adder - SOP form - Copy
Siddharth Varangaonkar
0
0
Sep 6, 2021
74LS153
f(A,B,C) = Σm(0,2,4,7) - Copy
Siddharth Varangaonkar
0
0
Sep 6, 2021
74LS153
74LS04
Full adder - Decoder - Copy
Siddharth Varangaonkar
0
0
Sep 6, 2021
74LS138
74LS20
exp 1 binary to gray
Siddharth Varangaonkar
0
0
Sep 3, 2021
74LS86
3 bit down counter
Siddharth Varangaonkar
0
0
Sep 2, 2021
74LS76
74LS08
exp 4 3 bit synchronous up count
Siddharth Varangaonkar
0
0
Sep 2, 2021
74LS76
74LS08
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