DFF

Midhuna
Midhuna M
• Created on Jun 15, 2021 • 0 • 0 • 1
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DFF
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Integrated Circuits Used

74LS00

Procedure

  1. Add IC 74LS00 into ICBase-3 (74LS00).
  2. Add IC 74LS00 into ICBase-4 (74LS00).
  3. Connect Pin-1 (Input) of ICBase-3 (74LS00) to Input-0.
  4. Connect Pin-4 (Input) of ICBase-3 (74LS00) to Input-0.
  5. Connect Pin-5 (Input) of ICBase-3 (74LS00) to Input-0.
  6. Connect Pin-16 (Input) of ICBase-3 (74LS00) to Pin-6 (Output) of ICBase-3 (74LS00).
  7. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS00).
  8. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS00).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-4 (74LS00).
  10. Connect GND Port to Pin-7 (Ground) of ICBase-4 (74LS00).
  11. Connect Manual clock Port to Pin-15 (Input) of ICBase-3 (74LS00).
  12. Connect Pin-2 (Input) of ICBase-3 (74LS00) to Manual clock Port.
  13. Connect Pin-18 (Input) of ICBase-3 (74LS00) to Pin-3 (Output) of ICBase-3 (74LS00).
  14. Connect Pin-3 (Output) of ICBase-4 (74LS00) to Pin-19 (Input) of ICBase-3 (74LS00).
  15. Connect Pin-1 (Input) of ICBase-4 (74LS00) to Pin-17 (Output) of ICBase-3 (74LS00).
  16. Connect Pin-2 (Input) of ICBase-4 (74LS00) to Pin-14 (Output) of ICBase-3 (74LS00).
  17. Connect Output-1 to Pin-3 (Output) of ICBase-4 (74LS00).
  18. Connect Output-0 to Pin-17 (Output) of ICBase-3 (74LS00).