OR GATE USING MINIMUM NUMBER OF NAND GATES

Madhu
Madhu Kasa
• Created on Jun 10, 2021 • 0 • 0 • 1
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OR GATE USING MINIMUM NUMBER OF NAND GATES
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Integrated Circuits Used

74LS00

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Add IC 74LS00 into ICBase-2 (74LS00).
  3. Connect Input-0 to Pin-1 (Input) of ICBase-1 (74LS00).
  4. Connect Input-0 to Pin-2 (Input) of ICBase-1 (74LS00).
  5. Connect Input-1 to Pin-1 (Input) of ICBase-2 (74LS00).
  6. Connect Input-1 to Pin-2 (Input) of ICBase-2 (74LS00).
  7. Connect Pin-1 (Input) of ICBase-3 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  8. Connect Pin-2 (Input) of ICBase-3 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  9. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS00).
  10. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  11. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS00).
  12. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS00).
  13. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  14. Add IC 74LS00 into ICBase-3 (74LS00).
  15. Connect Output-0 to Pin-3 (Output) of ICBase-3 (74LS00).
  16. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS00).