SR FLIPFLOP

Adil
Adil Muhammed A S
• Created on Jun 5, 2021 • 0 • 0 • 1
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SR FLIPFLOP
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Integrated Circuits Used

74LS00

Procedure

  1. Add IC 74LS00 into ICBase-2 (74LS00).
  2. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS00).
  3. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS00).
  4. Connect Input-10 to Pin-1 (Input) of ICBase-2 (74LS00).
  5. Connect Clock port of 10Hz frequency to Pin-2 (Input) of ICBase-2 (74LS00).
  6. Connect Clock port of 10Hz frequency to Pin-4 (Input) of ICBase-2 (74LS00).
  7. Connect Pin-15 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-2 (74LS00).
  8. Connect Input-9 to Pin-5 (Input) of ICBase-2 (74LS00).
  9. Connect Pin-19 (Input) of ICBase-2 (74LS00) to Pin-6 (Output) of ICBase-2 (74LS00).
  10. Connect Pin-18 (Input) of ICBase-2 (74LS00) to Pin-14 (Output) of ICBase-2 (74LS00).
  11. Connect Pin-16 (Input) of ICBase-2 (74LS00) to Pin-17 (Output) of ICBase-2 (74LS00).
  12. Connect Output-3 to Pin-14 (Output) of ICBase-2 (74LS00).
  13. Connect Output-2 to Pin-17 (Output) of ICBase-2 (74LS00).