lab1 2. AND gate using nor new

Aditya Srinivas
Aditya Srinivas Menon
Created on Jun 16, 2021 0 0 1
lab1 2. AND gate using nor new
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Integrated Circuits Used

Procedure

  1. Connect Pin-7 (Ground) of ICBase-3 (74LS02) to GND Port.
  2. Connect Pin-7 (Ground) of ICBase-2 (74LS02) to GND Port.
  3. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS02).
  4. Connect Pin-2 (Input) of ICBase-3 (74LS02) to Pin-1 (Output) of ICBase-1 (74LS02).
  5. Connect Pin-3 (Input) of ICBase-3 (74LS02) to Pin-1 (Output) of ICBase-2 (74LS02).
  6. Connect Output-0 to Pin-1 (Output) of ICBase-3 (74LS02).
  7. Connect Pin-20 (VCC) of ICBase-3 (74LS02) to VCC Port.
  8. Connect Pin-20 (VCC) of ICBase-2 (74LS02) to VCC Port.
  9. Connect Pin-20 (VCC) of ICBase-1 (74LS02) to VCC Port.
  10. Add IC 74LS02 into ICBase-1 (74LS02).
  11. Add IC 74LS02 into ICBase-2 (74LS02).
  12. Add IC 74LS02 into ICBase-3 (74LS02).
  13. Connect Pin-2 (Input) of ICBase-2 (74LS02) to Input-0.
  14. Connect Input-0 to Pin-3 (Input) of ICBase-2 (74LS02).
  15. Connect Pin-2 (Input) of ICBase-1 (74LS02) to Input-1.
  16. Connect Input-1 to Pin-3 (Input) of ICBase-1 (74LS02).