nor gate AND

Aditya Srinivas
Aditya Srinivas Menon
Created on Jun 16, 2021 0 0 1
nor gate AND
100%

Integrated Circuits Used

Procedure

  1. Add IC 74LS02 into ICBase-1 (74LS02).
  2. Add IC 74LS02 into ICBase-2 (74LS02).
  3. Add IC 74LS02 into ICBase-3 (74LS02).
  4. Connect Pin-20 (VCC) of ICBase-3 (74LS02) to VCC Port.
  5. Connect Pin-20 (VCC) of ICBase-2 (74LS02) to VCC Port.
  6. Connect Pin-20 (VCC) of ICBase-1 (74LS02) to VCC Port.
  7. Connect Pin-7 (Ground) of ICBase-3 (74LS02) to GND Port.
  8. Connect Pin-7 (Ground) of ICBase-2 (74LS02) to GND Port.
  9. Connect Pin-7 (Ground) of ICBase-1 (74LS02) to GND Port.
  10. Connect Pin-3 (Input) of ICBase-1 (74LS02) to Input-0.
  11. Connect Input-0 to Pin-2 (Input) of ICBase-1 (74LS02).
  12. Connect Pin-3 (Input) of ICBase-2 (74LS02) to Input-1.
  13. Connect Input-1 to Pin-2 (Input) of ICBase-2 (74LS02).
  14. Connect Pin-2 (Input) of ICBase-3 (74LS02) to Pin-1 (Output) of ICBase-1 (74LS02).
  15. Connect Pin-3 (Input) of ICBase-3 (74LS02) to Pin-1 (Output) of ICBase-2 (74LS02).
  16. Connect Output-0 to Pin-1 (Output) of ICBase-3 (74LS02).