SR latch using NOR gates only.

EDA
EDA HARSHITH
• Created on Jul 7, 2021 • 0 • 0 • 1
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SR latch using NOR gates only.
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Integrated Circuits Used

74LS02

Procedure

  1. Add IC 74LS02 into ICBase-1 (74LS02).
  2. Connect Pin-20 (VCC) of ICBase-1 (74LS02) to VCC Port.
  3. Connect Pin-7 (Ground) of ICBase-1 (74LS02) to GND Port.
  4. Connect Pin-2 (Input) of ICBase-1 (74LS02) to Input-15.
  5. Connect Pin-5 (Input) of ICBase-1 (74LS02) to Input-14.
  6. Connect Pin-3 (Input) of ICBase-1 (74LS02) to Pin-4 (Output) of ICBase-1 (74LS02).
  7. Connect Pin-6 (Input) of ICBase-1 (74LS02) to Pin-1 (Output) of ICBase-1 (74LS02).
  8. Connect Output-15 to Pin-4 (Output) of ICBase-1 (74LS02).
  9. Connect Output-14 to Pin-1 (Output) of ICBase-1 (74LS02).