Nor gate implementation and verification

EDA
EDA HARSHITH
• Created on Jun 10, 2021 • 0 • 0 • 3
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Nor gate implementation and verification
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Integrated Circuits Used

74LS32 74LS04 74LS02

Procedure

  1. Connect Pin-7 (Ground) of ICBase-1 (74LS32) to GND Port.
  2. Connect Pin-7 (Ground) of ICBase-2 (74LS04) to GND Port.
  3. Connect Pin-20 (VCC) of ICBase-2 (74LS04) to VCC Port.
  4. Connect Input-9 to Pin-18 (Input) of ICBase-1 (74LS32).
  5. Connect Input-10 to Pin-19 (Input) of ICBase-1 (74LS32).
  6. Connect Pin-1 (Input) of ICBase-2 (74LS04) to Pin-17 (Output) of ICBase-1 (74LS32).
  7. Connect Output-8 to Pin-2 (Output) of ICBase-2 (74LS04).
  8. Connect Pin-7 (Ground) of ICBase-3 (74LS02) to GND Port.
  9. Connect Pin-20 (VCC) of ICBase-3 (74LS02) to VCC Port.
  10. Connect Pin-2 (Input) of ICBase-3 (74LS02) to Input-2.
  11. Connect Pin-3 (Input) of ICBase-3 (74LS02) to Input-3.
  12. Connect Output-5 to Pin-1 (Output) of ICBase-3 (74LS02).
  13. Add IC 74LS32 into ICBase-1 (74LS32).
  14. Add IC 74LS04 into ICBase-2 (74LS04).
  15. Add IC 74LS02 into ICBase-3 (74LS02).
  16. Connect Pin-20 (VCC) of ICBase-1 (74LS32) to VCC Port.