half adder circuit using NAND gates only.

EDA
EDA HARSHITH
• Created on Jul 6, 2021 • 0 • 0 • 1
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half adder circuit using NAND gates only.
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Integrated Circuits Used

74LS00

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Add IC 74LS00 into ICBase-2 (74LS00).
  3. Connect Pin-7 (Ground) of ICBase-1 (74LS00) to GND Port.
  4. Connect Pin-7 (Ground) of ICBase-2 (74LS00) to GND Port.
  5. Connect Pin-20 (VCC) of ICBase-1 (74LS00) to VCC Port.
  6. Connect Pin-20 (VCC) of ICBase-2 (74LS00) to VCC Port.
  7. Connect Pin-1 (Input) of ICBase-1 (74LS00) to Input-15.
  8. Connect Pin-2 (Input) of ICBase-1 (74LS00) to Input-14.
  9. Connect Pin-4 (Input) of ICBase-1 (74LS00) to Input-15.
  10. Connect Pin-19 (Input) of ICBase-1 (74LS00) to Input-14.
  11. Connect Pin-5 (Input) of ICBase-1 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  12. Connect Pin-18 (Input) of ICBase-1 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  13. Connect Pin-16 (Input) of ICBase-1 (74LS00) to Pin-17 (Output) of ICBase-1 (74LS00).
  14. Connect Pin-15 (Input) of ICBase-1 (74LS00) to Pin-6 (Output) of ICBase-1 (74LS00).
  15. Connect Output-9 to Pin-14 (Output) of ICBase-1 (74LS00).
  16. Connect Pin-1 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  17. Connect Pin-2 (Input) of ICBase-2 (74LS00) to Pin-3 (Output) of ICBase-1 (74LS00).
  18. Connect Output-8 to Pin-3 (Output) of ICBase-2 (74LS00).