NAND GATE

Kavya Sravani
Kavya Sravani Inteti.
Created on Jun 8, 2021 0 0 3
NAND GATE
100%

Integrated Circuits Used

Procedure

  1. Add IC 74LS00 into ICBase-1 (74LS00).
  2. Add IC 74LS08 into ICBase-2 (74LS08).
  3. Add IC 74LS04 into ICBase-3 (74LS04).
  4. Connect Input-10 to Pin-1 (Input) of ICBase-1 (74LS00).
  5. Connect Input-11 to Pin-2 (Input) of ICBase-1 (74LS00).
  6. Connect Output-9 to Pin-3 (Output) of ICBase-1 (74LS00).
  7. Connect VCC Port to Pin-20 (VCC) of ICBase-1 (74LS00).
  8. Connect GND Port to Pin-7 (Ground) of ICBase-1 (74LS00).
  9. Connect Input-0 to Pin-1 (Input) of ICBase-2 (74LS08).
  10. Connect Input-1 to Pin-2 (Input) of ICBase-2 (74LS08).
  11. Connect Pin-1 (Input) of ICBase-3 (74LS04) to Pin-3 (Output) of ICBase-2 (74LS08).
  12. Connect Output-1 to Pin-2 (Output) of ICBase-3 (74LS04).
  13. Connect VCC Port to Pin-20 (VCC) of ICBase-3 (74LS04).
  14. Connect GND Port to Pin-7 (Ground) of ICBase-2 (74LS08).
  15. Connect VCC Port to Pin-20 (VCC) of ICBase-2 (74LS08).
  16. Connect GND Port to Pin-7 (Ground) of ICBase-3 (74LS04).
  17. Connect GND Port to ICBase-3 (74LS04).