Harini T

INDIAN INSTITUTE OF INFORMATION TECHNOLOGY KOTTAYAM • Computer

21 Circuits

De-Morgan's Law 2

De-Morgan's Law 2

74LS04 74LS08 74LS32

De-Morgan’s Law 1

De-Morgan’s Law 1

74LS04 74LS08 74LS32

3-bit Gray to Binary code conversion

3-bit Gray to Binary code conversion

74LS04 74LS08 74LS32

F(A, B, C, D) = m(1, 2, 4, 5, 9, 10, 12, 15) +D (8,11,13)

F(A, B, C, D) = m(1, 2, 4, 5, 9, 10, 12, 15) +D (8,11,13)

74LS00 74LS10 74LS20

2's complement

2's complement

74LS04 74LS08 74LS32

F(A, B, C, D) = ∑ m(1, 2, 4, 5, 9, 10, 12, 15)+d (8,11,13).

F(A, B, C, D) = ∑ m(1, 2, 4, 5, 9, 10, 12, 15)+d (8,11,13).

1-Bit Comparator

1-Bit Comparator

74LS04 74LS08 74LS02

SR Latch using NOR Gates

SR Latch using NOR Gates

Half adder using NOR gates

Half adder using NOR gates

1:2 Demultiplexer using basic gates

1:2 Demultiplexer using basic gates

2:4 Decoder using basic gates

2:4 Decoder using basic gates

4:1 Multiplexer using basic gates

4:1 Multiplexer using basic gates

74LS04 74LS11 74LS32

XNOR using basic gates

XNOR using basic gates

74LS08 74LS04 74LS32

2:1 Multiplexer using basic gates

2:1 Multiplexer using basic gates

74LS08 74LS04 74LS32

AND Gate using NOR ONLY

AND Gate using NOR ONLY

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