Tharun Vemula

INDIAN INSTITUTE OF INFORMATION TECHNOLOGY KOTTAYAM • Computer

23 Circuits

Trial

Trial

Gray code to Binary Conversion

Gray code to Binary Conversion

74LS08 74LS00 74LS32

De-Morgans's Theorem

De-Morgans's Theorem

74LS04 74LS32 74LS08

Function Implementation

Function Implementation

74LS11 74LS08 74LS04 74LS32

2's complement of 3-bit binary number

2's complement of 3-bit binary number

74LS04 74LS11 74LS08 74LS32

Function Realisation

Function Realisation

F1 and F2 - Copy - Copy

F1 and F2 - Copy - Copy

74LS32 74LS11 74LS04 74LS08

F1 and F2 - Copy

F1 and F2 - Copy

74LS11 74LS04 74LS08 74LS32

F1 and F2

F1 and F2

74LS04 74LS32 74LS08 74LS11

SR Latch

SR Latch

Single Bit Comparator

Single Bit Comparator

74LS04 74LS08 74LS02

1 : 2 Demultiplexer

1 : 2 Demultiplexer

Half Adder using NOR Gates

Half Adder using NOR Gates

Half Adder using NOR Gates

Half Adder using NOR Gates

4 : 1 Mux

4 : 1 Mux

74LS04 74LS11 74LS32

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